// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  cmpa_reg_offset.h
// Project line  :  K3
// Department    :  K3
// Author        :  Huawei
// Version       :  V100
// Date          :  2015/4/10
// Description   :  HiVcodecV100 VDEC
// Others        :  Generated automatically by nManager V4.2 
// History       :  Huawei 2018/04/10 10:02:43 Create file
// ******************************************************************************

#ifndef __CMPA_REG_OFFSET_H__
#define __CMPA_REG_OFFSET_H__

/* CMPA Base address of Module's Register */
#define SOC_CMPA_BASE                       (0xa800)

/******************************************************************************/
/*                      SOC CMPA Registers' Definitions                            */
/******************************************************************************/

#define SOC_CMPA_CMPA_YSTADDR_REG         (SOC_CMPA_BASE + 0x0)  
#define SOC_CMPA_CMPA_UVOFFSET_REG        (SOC_CMPA_BASE + 0x4)  
#define SOC_CMPA_CMPA_YSTRIDE_REG         (SOC_CMPA_BASE + 0x8)  
#define SOC_CMPA_CMPA_LINE_NUM_STADDR_REG (SOC_CMPA_BASE + 0xC)  
#define SOC_CMPA_CMPA_LINE_LEVEL_REG      (SOC_CMPA_BASE + 0x10) 
#define SOC_CMPA_CMPA_PIC_INFO_OTHERS_REG (SOC_CMPA_BASE + 0x14) 
#define SOC_CMPA_CMPA_PIC_INFO_H265_REG   (SOC_CMPA_BASE + 0x18) 
#define SOC_CMPA_CMPA_PIC_PIX_INFO_REG    (SOC_CMPA_BASE + 0x1C) 
#define SOC_CMPA_CMPA_BITDEPTH_REG        (SOC_CMPA_BASE + 0x20) 
#define SOC_CMPA_CMPA_HEAD_INF_SIZE_REG   (SOC_CMPA_BASE + 0x24) 
#define SOC_CMPA_CMPA_DEBUF_INFO_REG      (SOC_CMPA_BASE + 0x28) 
#define SOC_CMPA_CMPA_HEAD_STRIDE_REG     (SOC_CMPA_BASE + 0x2C) 
#define SOC_CMPA_CMPA_FORMAT_CFG_REG      (SOC_CMPA_BASE + 0x30) 
#define SOC_CMPA_CUR_ST_REG               (SOC_CMPA_BASE + 0x34) 

#endif // __CMPA_REG_OFFSET_H__
